Drastic reduction in inductance.
Distorted secondary current waveforms.
Loss of accuracy and potential protection system failure.
Root Cause:
Fault currents (e.g., short circuits) often contain a DC component (offset) that drives the core into saturation.
Example: A phase-to-ground fault may produce a decaying DC offset superimposed on the AC fault current.
Effect on Core:
The DC component shifts the operating point of the core, reducing the available linear flux range.
Root Cause:
Continuous overloads or high-magnitude fault currents (e.g., 10x–20x rated current) exceed the core’s flux-carrying capacity.
Inadequate CT sizing for the application (e.g., using a 500A CT for a circuit with 800A continuous current).
Effect on Core:
The core reaches its saturation flux density (Bsat), typically 1.5–1.8 T for silicon steel.
Root Cause:
Excessive impedance in the secondary circuit (e.g., long cables, multiple relays) increases the burden (VA), forcing the core to draw more magnetizing current.
Formula: Burden (VA)=I22×Zload. A higher Zload requires more magnetizing current to maintain I2.
Effect on Core:
Increased magnetizing current leads to core heating and eventual saturation.
Impact Category | Specific Effects |
---|---|
Measurement Inaccuracy | - Secondary current lags or fails to track primary current. - Error exceeds accuracy class limits (e.g., a 0.5% CT may show 10%+ error). |
Protection System Failure | - Relays may not trip during faults (e.g., overcurrent or differential protection). - False tripping due to harmonic interference. |
Equipment Damage | - Overheating of windings or core, leading to insulation degradation. - Potential fire risk in oil-immersed CTs. |
Grid Instability | - Unreliable fault detection may delay isolation, causing cascading outages. |
Oscilloscope Measurement:
In saturated CTs, the secondary current waveform becomes flat-topped or clipped (see Figure 1 below).
Harmonic content increases, with dominant 3rd and 5th harmonics.
FFT Analysis:
Use a power quality analyzer to detect high harmonic distortion (THD >5% in protection CTs).
Digital Multimeter (DMM):
Measure the DC component in the secondary current during a fault. A DC offset >10% of the AC component indicates saturation risk.
Overheating in the core or windings (e.g., hotspot temperature >80°C) may signal prolonged saturation.
Select Appropriate CT Ratings:
Continuous Thermal Current (CTC): Ensure the CT’s CTC ≥ 1.2x the maximum continuous primary current.
Short-Time Thermal Current (STC): Choose a CT with STC ≥ the expected fault current (e.g., 31.5kA for a 10kV system).
Use Larger Cores or Higher Permeability Materials:
Amorphous metal cores offer lower coercivity and higher linearity than silicon steel.
Example: Amorphous cores reduce saturation by 50% in low-load applications.
Reduce Secondary Burden:
Shorten cable lengths or use higher-conductivity wires (e.g., copper instead of aluminum).
Limit the number of devices connected to a single CT (e.g., use a multi-output CT for metering and protection).
DC Offset Filtering:
Install passive filters (e.g., RC circuits) in the secondary circuit to attenuate DC components.
Adaptive Relaying:
Use modern numerical relays with saturation detection algorithms (e.g., comparing primary current estimates from voltage and impedance).
CT Saturation Testing:
Perform excitation curve tests (伏安特性试验) during commissioning to verify core integrity. A flat curve indicates saturation at low voltages.
Differential Protection Enhancements:
Use harmonic restraint (e.g., blocking on 2nd harmonic) to avoid false tripping during inrush currents (e.g., transformer energization).
Zoning and Coordination:
Install CTs closer to the fault source to reduce the DC offset component (e.g., at the transformer primary rather than the feeder).
Problem: A 33kV feeder’s protection relay failed to trip during a bolted fault, leading to a transformer burnout.
Analysis:
Post-fault waveform analysis showed severe CT saturation (secondary current clipped at 30% of expected value).
Root cause: Inadequate CT sizing (500A/5A CT used for a circuit with 800A maximum load).
Solution:
Upgraded to a 1000A/5A CT with a larger core and Class 5P20 accuracy.
Added a harmonic filter to the relay input to mitigate DC offset.
Outcome: Successful fault clearing in subsequent tests, with no saturation observed.
Load and Fault Analysis:
Conduct short-circuit studies to determine maximum fault currents and DC offset magnitudes.
Core Material Selection:
Use silicon steel for protection CTs (better saturation tolerance during faults).
Use ferrite or amorphous cores for metering CTs (prioritize low losses at rated current).
Regular Maintenance:
Test CT excitation curves every 5–10 years to detect core degradation.
Inspect secondary connections for looseness, which can increase burden.
Digital Solutions:
Deploy IoT-enabled CTs with real-time saturation alerts (e.g., using strain gauges to monitor core stress).
I graduated from the University of Electronic Science and Technology, majoring in electric power engineering, proficient in high-voltage and low-voltage power transmission and transformation, smart grid and new energy grid-connected technology applications. With twenty years of experience in the electric power industry, I have rich experience in electric power design and construction inspection, and welcome technical discussions.